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Course Outline

DAY 1:

  • RTE and SchMin ECU Software Architecture
  • Methodology: Virtual Functional Bus (VFB), Component Types, Communication Patterns, and Ports
  • Discussion of RTE examples, RTE Events, data consistency in RTE, and the RTE generator
  • BSW Scheduler (SchM)
  • Case study: CUBAS ETAS RTE generator

DAY 2:

  • AUTOSAR 4.0
  • Multicore architectures and protection mechanisms
  • Variant handling and measurement techniques
  • Calibration processes

Requirements

  • Fundamental knowledge of embedded systems
  • Basic understanding of AUTOSAR

Please note: This course requires the use of customer-provided software licenses and cannot be delivered without them.

 14 Hours

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